(1) Field of the Invention
This invention relates to a semiconductor device and a system having the semiconductor device mounted thereon, and more particularly to a ball grid array packaged semiconductor device and a system having the ball grid array packaged semiconductor device mounted thereon.
(2) Description of the Related Art
These days, with the progress of higher integration of elements into semiconductor devices, each semiconductor device has an increasing number of connection pins for connection to a mounting board. Further, to reduce the area of the semiconductor device, a narrower pin pitch is employed.
Packages of semiconductor devices include a QFP (Quad Flat Package), an SQFP (Shrink Quad Flat Package), and so forth. However, these packages are limited in their capability of coping with increase in the number of connection pins and reduction in the area of the semiconductor device. To overcome the problem, recently, attention has come to be paid to a BGA (Ball Grid Array) package allowing a large number of connection pins to be arranged thereon.
A BGA packaged semiconductor device includes connection pins (pads) on the underside of the package. FIG. 16 is a cross-sectional view of a conventional BGA packaged semiconductor device. The figure shows the semiconductor device 100, and a mounting board 110 on which the semiconductor device 100 is mounted. The semiconductor device 100 is mounted on the mounting board 110 by solder balls 111.
The semiconductor device 100 is comprised of the package 101, an inner board 102 fixed to an inner wall of the package 101 toward the mounting board 110, cylindrical vias 103 extending through the inner board 102 to the underside of the package 101, a bare chip 104 fixed to the inner wall of the package 101 toward the mounting board 110, and bonding wires 105 connecting the bare chip 104 and the vias 103 to each other.
Each via 103 has a pad 103a formed at one end thereof on the side of the inner board 102 for connection to one of the bonding wires 105, and a pad 103b formed at the other end thereof on the side of the mounting board 110 for connection to the wiring pattern on the mounting board 110 via one of the solder balls 111. The bare chip 104 have pads 104a for connection to the bonding wires 105.
Signal lines routed on the top of or inside the bare chip 104 are connected to the respective pads 104a to allow connection thereto. The pads 104a and the pads 103a of the vias 103 are connected by the bonding wires 105. The pads 103b of the vias 103 are connected to the wiring pattern on the mounting board 110 via the solder balls 111. Thus, the semiconductor device 100 has its signal lines provided with respective conductive extensions leading only to the underside of the package 101 toward the mounting board 110.
Incidentally, some BGA packaged semiconductor devices have 800 connection pins (pads 103b of the vias 103 in FIG. 16), and further some have a pin pitch of 0.8 mm. A semiconductor device of this kind with a large number of connection pins is mounted on a build-up board or a multi-layer board comprised of a lot of layers.
However, the semiconductor device is further making a progress toward still higher integration of elements therein, resulting in an even larger number of connection pins provided thereon. This increases the wiring density of a wiring pattern on a mounting board, which makes the wiring pattern difficult to be routed.